SH7203 Datasheet, PDF (1615/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 31 Electrical Characteristics
Item
Symbol Min.
Max. Unit Figure
Read data hold time
tNRDH
5
⎯
ns Figures 31.71,
31.73
Data write setup time
tNDWS
32 × tpcyc
⎯
ns Figure 31.72
Command to status read transition
time
tNCDSR
4 × tfcyc
⎯
ns Figure 31.73
Command output off to status read tNCDFSR 3.5 × tfcyc
⎯
ns
transition time
Status read setup time
tNSTS
2.5 × tfcyc
⎯
ns
Note:
t_fcyc indicates the period of one cycle of the FLCTL clock.
t indicates the period of one cycle of the FLCTL clock when the value of the NANDWF bit
wfcyc
is 0. On the other hand, t indicates the period of two cycles of the FLCTL clock when the
wfcyc
value of the NANDWF bit is 1.
t_pcyc indicates the period of one cycle of the peripheral clock (Pφ).
FCE
(Low)
FCDE
FOE
FWE
FSC
(High)
NAF7 to NAF0
(High)
FRB
t_NCDS
t_NWP
t_NCDH
t_NCDAD1
t_NDOS t_NDOH
Command
Figure 31.69 NAND Type Flash Memory Command Issuance Timing
Rev. 2.00 Apr. 16, 2008 Page 1585 of 1652
REJ09B0313-0200