SH7203 Datasheet, PDF (1623/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 31 Electrical Characteristics
31.4.18 H-UDI Timing
Table 31.25 H-UDI Timing
Conditions: VCC = PLLVCC = USBDVCC = 1.1 to 1.3 V, PVCC = USBDPVCC = 3.0 to 3.6 V,
AVCC = 3.0 to 3.6 V, USBAVCC = 1.1 to 1.3 V, USBAPVCC = 3.0 to 3.6 V,
VSS = PLLVSS = PVSS = AVSS = USBDVSS = USBAVSS = USBDPVSS =
USBAPVSS = 0 V, Ta = −20 to 85 °C
Item
Symbol
Min.
Max.
Unit
TCK cycle time
t_TCKcyc
50*
—
ns
TCK high pulse width t_TCKH
0.4
0.6
t_TCKcyc
TCK low pulse width t
0.4
0.6
t
TCKL
TCKcyc
TDI setup time
t_TDIS
10
—
ns
TDI hold time
t_TDIH
10
—
ns
TMS setup time
t_TMSS
10
—
ns
TMS hold time
t_TMSH
10
—
ns
TDO delay time
t
—
16
ns
TDOD
Note: * Should be greater than the peripheral clock (Pφ) cycle time.
Figure
Figure 31.80
Figure 31.81
1/2 PVcc
t_TCKH
t_TCKcyc
t_TCKL
V_IH
V_IH
V_IL
V_IL
V_IH
1/2 PVcc
Figure 31.80 TCK Input Timing
Rev. 2.00 Apr. 16, 2008 Page 1593 of 1652
REJ09B0313-0200