SH7203 Datasheet, PDF (1426/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
7
HIZ
0
R/W Port High Impedance
Selects whether the state of specific output pin is
retained or high impedance in software standby mode
or deep standby mode. As to which pins are
controlled, see appendix A, Pin States.
This bit must not be set while the TME bit in WTSCR
of the WDT is 1. To set the output pin to high-
impedance, set the HIZ bit to 1 only while the TME bit
is 0.
0: The pin state is retained in software standby mode
or deep standby mode.
1: The pin is set to high-impedance in software
standby mode or deep standby mode.
6
⎯
1
R
Reserved
This bit is always read as 1. The write value should
always be 1.
5
MSTP35 1
R/W Module Stop 35
When the MSTP35 bit is set to 1, the supply of the
clock to the MTU2 is halted.
0: MTU2 runs.
1: Clock supply to MTU2 is halted.
4, 3
⎯
All 1
R
Reserved
These bits are always read as 1. The write value
should always be 1.
Rev. 2.00 Apr. 16, 2008 Page 1396 of 1652
REJ09B0313-0200