SH7203 Datasheet, PDF (399/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 9 Bus State Controller (BSC)
Tm1
Tmd1w
Tmd1
Tmd2
Tmd3
Tmd4
CKIO
FRAME
A
D31 to D0
A25 to A0
D0
D1
D2
D3
CS6
RD/WR
WAIT
BS
DACKn*
Note: * The waveform for DACKn is when active low is specified.
Figure 9.50 Burst MPX Space Access Timing
(Burst Read, No Wait, or Software Wait 1, CS6WCR.MPXMD = 0)
Rev. 2.00 Apr. 16, 2008 Page 369 of 1652
REJ09B0313-0200