SH7203 Datasheet, PDF (51/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 1 Overview
Classification Symbol
I/O Name
Function
I/O ports
PB11 to PB8, I/O General port
PC14 to PC0,
PD15 to PD0,
PE15 to PE0,
PF30 to PF0
82-bit general I/O port pins.
PA7 to PA0, I
PB7 to PB0
General port
16-bit general I/O port pins.
PB12
O General port
1-bit general output port pin.
User debugging TCK
interface (H-UDI) _TMS
I
Test clock
Test-clock input pin.
I
Test mode select Test-mode select signal input pin.
TDI
I
Test data input Serial input pin for instructions and
data.
TDO
O Test data output Serial output pin for instructions and
data.
TRST
I
Test reset
Initialization-signal input pin.
Emulator
interface
AUDATA3 to O AUD data
AUDATA0
Branch source or destination
address output pins.
AUDCK
AUDSYNC
ASEBRKAK
ASEBRK
User break
UBCTRG
controller (UBC)
O AUD clock
Sync-clock output pin.
O AUD sync signal Data start-position acknowledge-
signal output pin.
O Break mode
acknowledge
Indicates that the E10A-USB
emulator has entered its break
mode.
I
Break request E10A-USB emulator break input pin.
O User break
Trigger output pin for UBC condition
trigger output match.
Rev. 2.00 Apr. 16, 2008 Page 21 of 1652
REJ09B0313-0200