SH7203 Datasheet, PDF (1175/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 23 USB 2.0 Host/Function Module (USB)
23.3.28 DCP Configuration Register (DCPCFG)
DCPCFG is a register that selects continuous transfer mode or non-continuous transfer mode, the
data transfer direction, and whether to continue or disable the DCP pipe operation at the end of
transfer for the default control pipe (DCP).
This register is initialized by a power-on reset or a software reset.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
CNTMD
SHT
NAK
-
-
DIR
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R R/W R/W R
R R/W R
R
R
R
Bit
Bit Name
15 to 9 ⎯
8
CNTMD
7
SHTNAK
6, 5
⎯
Initial
Value R/W Description
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
0
R/W Continuous Transfer Mode
0: Non-continuous transfer mode
1: Continuous transfer mode
Because the DCP buffer memory is used for both
control read transfers and control write transfers,
this bit is used as the bit common to both,
regardless of the transfer direction.
0
R/W Pipe Disabled at End of DCP Transfer
0: A pipe is continued at the end of transfer
1: A pipe is disabled at the end of transfer
(response PID = NAK)
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 2.00 Apr. 16, 2008 Page 1145 of 1652
REJ09B0313-0200