SH7203 Datasheet, PDF (1331/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 25 Pin Function Controller (PFC)
Register Name
Abbreviation R/W
Initial
Value
Address
Access
Size
Port F control register H4
PFCRH4
R/W H'0000 H'FFFE3A88 8, 16, 32
Port F control register H3
PFCRH3
R/W H'0000 H'FFFE3A8A 8, 16
Port F control register H2
PFCRH2
R/W H'0000 H'FFFE3A8C 8, 16, 32
Port F control register H1
PFCRH1
R/W H'0000 H'FFFE3A8E 8, 16
Port F control register L4
PFCRL4
R/W H'0000 H'FFFE3A90 8, 16, 32
Port F control register L3
PFCRL3
R/W H'0000 H'FFFE3A92 8, 16
Port F control register L2
PFCRL2
R/W H'0000 H'FFFE3A94 8, 16, 32
Port F control register L1
PFCRL1
R/W H'0000 H'FFFE3A96 8, 16
SSI oversampling clock selection SCSR
register
R/W H'0000 H'FFFE3AA2 8, 16
Notes: 1. In 8-bit access, the register can be read but cannot be written to.
2. The initial value depends on the operating mode of the LSI.
25.2.1 Port B I/O Register L (PBIORL)
PBIORL is a 16-bit readable/writable register that is used to set the pins on port B as inputs or
outputs. The PB11IOR to PB8IOR bits correspond to the PB11/CTx1 to PB8/CRx0/ CRx0/CRx1
pins, respectively. PBIORL is enabled when the port B pins are functioning as general-purpose
input/output (PB11 to PB18). In other states, they are disabled. If a bit in PBIORL is set to 1, the
corresponding pin on port B functions as output. If it is cleared to 0, the corresponding pin
functions as input.
Bits 15 to 12 and bits 7 to 0 in PBIORL are reserved. These bits are always read as 0. The write
value should always be 0.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
PB11 PB10 PB9 PB8
IOR IOR IOR IOR
-
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R R/W R/W R/W R/W R
R
R
R
R
R
R
R
Rev. 2.00 Apr. 16, 2008 Page 1301 of 1652
REJ09B0313-0200