SH7203 Datasheet, PDF (1389/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 I/O Ports
Initial
Bit
Bit Name Value
R/W
15 to 8 ⎯
All 0
R
7
PA7DR Pin state R
6
PA6DR Pin state R
5
PA5DR Pin state R
4
PA4DR Pin state R
3
PA3DR Pin state R
2
PA2DR Pin state R
1
PA1DR Pin state R
0
PA0DR Pin state R
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
See table 26.2.
Table 26.2 Port A Data Registers L (PADRL) Read/Write Operation
• Bits 7 to 0 of PADRL
Pin Function
Read Operation
General input
Pin state
ANn input/DAn output
Disabled
[Legend]
n = 7 to 0 (DA: DA0 and DA1 only)
Write Operation
Ignored (Does not affect the pin state.)
Ignored (Does not affect the pin state.)
Rev. 2.00 Apr. 16, 2008 Page 1359 of 1652
REJ09B0313-0200