SH7203 Datasheet, PDF (255/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 8 Cache
8.3.6 Coherency of Cache and External Memory
Use software to ensure coherency between the cache and the external memory. When memory
shared by this LSI and another device is mapped in the cache-enabled space, operate the memory-
mapped cache to invalidate and write back as required.
Rev. 2.00 Apr. 16, 2008 Page 225 of 1652
REJ09B0313-0200