SH7203 Datasheet, PDF (1192/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 23 USB 2.0 Host/Function Module (USB)
23.4 Operation
23.4.1 System Control
This section describes the register operations that are necessary to the initial settings of this
module, and the registers necessary for power consumption control.
(1) Resets
Table 23.10 lists the types of controller resets. For the initialized states of the registers following
the reset operations, see section 23.3, Register Description.
Table 23.10 Types of Reset
Name
Power-on reset
Software reset
USB bus reset
Operation
Low level input from the RES pin
Operation using the USBE bit in SYSCFG
Automatically detected by this module from the D+ and D− lines when the
function controller function is selected
(2) Controller Function Selection
This module can select the host controller function or function controller function using the
DCFM bit in SYSCFG.
(3) Enabling High-Speed Operation
This module can select a USB communication speed (communication bit rate) of either high-speed
or full-speed using software. In order to enable the high-speed operation for this module, the HSE
bit in SYSCFG should be set to 1. Changing the HSE bit should be done in the initial settings
immediately after a power-on reset or with the D+ line pull-up disabled (DPRPU = 0).
If high-speed mode has been enabled, this module executes the reset handshake protocol, and the
USB communication speed is set automatically. The results of the reset handshake can be
confirmed using the RHST bit in DVSTCTR.
If high-speed operation has been disabled, this module operates at full-speed.
Rev. 2.00 Apr. 16, 2008 Page 1162 of 1652
REJ09B0313-0200