SH7203 Datasheet, PDF (1561/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 31 Electrical Characteristics
31.4.3 Bus Timing
Table 31.8 Bus Timing
Conditions: VCC = PLLVCC = USBDVCC = 1.1 to 1.3 V, PVCC = USBDPVCC = 3.0 to 3.6 V,
AVCC = 3.0 to 3.6 V, USBAVCC = 1.1 to 1.3 V, USBAPVCC = 3.0 to 3.6 V,
VSS = PLLVSS = PVSS = AVSS = USBDVSS = USBAVSS = USBDPVSS =
USBAPVSS = 0 V, Ta = −20 to 85 °C
Item
Address delay time 1
Address delay time 2
Address delay time 3
Address setup time
Chip enable setup time
Address hold time
BS delay time
CS delay time 1
CS delay time 2
Read write delay time 1
Read write delay time 2
Read strobe delay time
Read data setup time 1
Read data setup time 2
Symbol
t
AD1
Bφ = 66.66 MHz*¹*²
Min.
Max.
1
13
Unit
ns
t_AD2
1/2t_cyc
1/2t_cyc + 13 ns
t_AD3
1/2t_cyc
1/2t_cyc + 13 ns
t_AS
0
—
ns
t_CS
0
—
ns
t
0
—
ns
AH
t
—
13
ns
BSD
t_CSD1
1
13
ns
t_CSD2
t_RWD1
1/2t_cyc
1
1/2t_cyc + 13 ns
13
ns
t_RWD2
t
RSD
1/2t_cyc
1/2t
cyc
1/2t_cyc + 13 ns
1/2t + 13 ns
cyc
t
1/2t + 13 —
ns
RDS1
cyc
t
8
—
ns
RDS2
Figure
Figures 31.13 to
31.38, 31.40 to
31.44
Figure 31.21
Figures 31.39, 31.40
Figures 31.13 to
31.16, 31.21
Figures 31.13 to
31.16, 31.21
Figures 31.13 to
31.16
Figures 31.13 to
31.35, 31.39, 31.41
to 31.44
Figures 31.13 to
31.38, 31.41 to
31.44
Figures 31.39, 31.40
Figures 31.13 to
31.38, 31.41 to
31.44
Figures 31.39, 31.40
Figures 31.13 to
31.17, 31.19 to
31.21, 31.41, 31.42
Figures 31.13 to
31.17, 31.19, 31.20,
31.41 to 31.44
Figures 31.18, 31.22
to 31.25, 31.30 to
31.32
Rev. 2.00 Apr. 16, 2008 Page 1531 of 1652
REJ09B0313-0200