SH7203 Datasheet, PDF (24/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

23.3.1 System Configuration Control Register (SYSCFG) ........................................... 1095
23.3.2 System Configuration Status Register (SYSSTS)............................................... 1097
23.3.3 Device State Control Register (DVSTCTR) ....................................................... 1099
23.3.4 Test Mode Register (TESTMODE) .................................................................... 1103
23.3.5 FIFO Port Configuration Registers (CFBCFG, D0FBCFG, D1FBCFG) ........... 1105
23.3.6 FIFO Port Registers (CFIFO, D0FIFO, D1FIFO) .............................................. 1108
23.3.7 FIFO Port Select Registers (CFIFOSEL, D0FIFOSEL, D1FIFOSEL)............... 1109
23.3.8 FIFO Port Control Registers (CFIFOCTR, D0FIFOCTR, D1FIFOCTR) .......... 1113
23.3.9 FIFO Port SIE Register (CFIFOSIE) .................................................................. 1115
23.3.10 Transaction Counter Registers (D0FIFOTRN, D1FIFOTRN) ........................... 1116
23.3.11 Interrupts Enable Register 0 (INTENB0) ........................................................... 1117
23.3.12 Interrupt Enabled Register 1 (INTENB1) ........................................................... 1120
23.3.13 BRDY Interrupts Enable Register (BRDYENB) ................................................ 1122
23.3.14 NRDY Interrupt Enable Register (NRDYENB) ................................................. 1123
23.3.15 BEMP Interrupt Enabled Register (BEMPENB)................................................ 1125
23.3.16 Interrupt Status Register 0 (INTSTS0) ............................................................... 1127
23.3.17 Interrupt Status Register 1 (INTSTS1) ............................................................... 1129
23.3.18 BRDY Interrupt Status Register (BRDYSTS) .................................................... 1132
23.3.19 NRDY Interrupt Status Register (NRDYSTS) ................................................... 1134
23.3.20 BEMP Interrupt Status Register (BEMPSTS) .................................................... 1136
23.3.21 Frame Number Register (FRMNUM)................................................................. 1138
23.3.22 μFrame Number Register (UFRMNUM) ........................................................... 1140
23.3.23 USB Address Register (USBADDR).................................................................. 1141
23.3.24 USB Request Type Register (USBREQ) ............................................................ 1142
23.3.25 USB Request Value Register (USBVAL) .......................................................... 1143
23.3.26 USB Request Index Register (USBINDX) ......................................................... 1143
23.3.27 USB Request Length Register (USBLENG) ...................................................... 1144
23.3.28 DCP Configuration Register (DCPCFG) ............................................................ 1145
23.3.29 DCP Maximum Packet Size Register (DCPMAXP) .......................................... 1147
23.3.30 DCP Control Register (DCPCTR) ...................................................................... 1148
23.3.31 Pipe Window Select Register (PIPESEL)........................................................... 1150
23.3.32 Pipe Configuration Register (PIPECFG) ............................................................ 1151
23.3.33 Pipe Buffer Setting Register (PIPEBUF)............................................................ 1154
23.3.34 Pipe Maximum Packet Size Register (PIPEMAXP)........................................... 1156
23.3.35 Pipe Timing Control Register (PIPEPERI)......................................................... 1157
23.3.36 PIPEn Control Registers (PIPEnCTR) (n = 1 to 7)............................................. 1159
23.3.37 USB AC Characteristics Switching Register (USBACSWR)............................. 1161
23.4 Operation ......................................................................................................................... 1162
23.4.1 System Control ................................................................................................... 1162
23.4.2 Interrupt Functions.............................................................................................. 1164
Rev. 2.00 Apr. 16, 2008 Page xxiv of xxx
REJ09B0313-0200