SH7203 Datasheet, PDF (1348/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 25 Pin Function Controller (PFC)
(2) Port D Control Register L3 (PDCRL3)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PD11MD[2:0]
-
PD10MD[2:0]
-
PD9MD[2:0]
-
PD8MD[2:0]
Initial value: 0
0
0 0/1* 0
0
0 0/1* 0
0
0 0/1* 0
0
0 0/1*
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Note: * Depends on the operating mode of the LSI.
Initial
Bit
Bit Name Value R/W
15
⎯
0
R
14 to 12 PD11MD[2:0] 000/001* R/W
11
⎯
0
R
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
PD11 Mode
Select the function of the
PD11/D27/PINT3/DREQ1/TIOC3D pin.
• Area 0: 32-bit mode
000: Setting prohibited
001: D27 I/O (data) (initial value)
010: Setting prohibited
011: Setting prohibited
100: Setting prohibited
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
• Area 0: 16-bit mode
000: PD11 I/O (port) (initial value)
001: D27 I/O (data)
010: PINT3 input (INTC)
011: Setting prohibited
100: DREQ1 input (DMAC)
101: TIOC3D I/O (MTU2)
110: Setting prohibited
111: Setting prohibited
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 2.00 Apr. 16, 2008 Page 1318 of 1652
REJ09B0313-0200