SH7203 Datasheet, PDF (1296/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 LCD Controller (LCDC)
Table 24.5 Limits on the Resolution of Rotated Displays, Burst Length, and Connected
Memory (16-bit SDRAM)
Image for Display in
Memory
(X-Resolution × Y-
Resolution)
LCD Module
(X-Resolution × Number of Colors for
Y-Resolution) Display
240 × 320
320 × 240
Monochrome
4 bpp
(packed)
4 bpp
(unpacked)
6 bpp
Color
8 bpp
16 bpp
234 × 320
320 × 234
Monochrome 6 bpp
Color
16 bpp
Number of
Column
Address Bits of Burst Length of
SDRAM
LCDC (LDSMR*)
8 bits
Not more than 4 bursts
9 bits
Not more than 8 bursts
10 bits
Not more than 16
bursts
8 bits
Unusable
9 bits
4 bursts
10 bits
Not more than 8 bursts
8 bits
Unusable
9 bits
4 bursts
10 bits
Not more than 8 bursts
8 bits
Unusable
9 bits
4 bursts
10 bits
Not more than 8 bursts
8 bits
Unusable
9 bits
Unusable
10 bits
4 bursts
8 bits
Unusable
9 bits
4 bursts
10 bits
Not more than 8 bursts
8 bits
Unusable
9 bits
Unusable
10 bits
4 bursts
Rev. 2.00 Apr. 16, 2008 Page 1266 of 1652
REJ09B0313-0200