SH7203 Datasheet, PDF (1450/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 Power-Down Modes
28.3.3 Software Standby Mode Application Example
This example describes a transition to software standby mode on the falling edge of the NMI
signal, and cancellation on the rising edge of the NMI signal. The timing is shown in figure 28.1.
When the NMI pin is changed from high to low level while the NMI edge select bit (NMIE) in the
interrupt control register 0 (ICR0) is set to 0 (falling edge detection), the NMI interrupt is
accepted. When the NMIE bit is set to 1 (rising edge detection) by the NMI exception service
routine, the STBY and DEEP bits in STBCR are set to 1 and 0 respectively, and a SLEEP
instruction is executed, software standby mode is entered. Thereafter, software standby mode is
canceled when the NMI pin is changed from low to high level.
Oscillator
CK
NMI pin
NMIE bit
STBY bit
LSI state
Program
execution
NMI
Exception
exception
handling
service routine
Software
standby mode
Oscillation
settling time
NMI exception
handling
Figure 28.1 NMI Timing in Software Standby Mode (Application Example)
Rev. 2.00 Apr. 16, 2008 Page 1420 of 1652
REJ09B0313-0200