SH7203 Datasheet, PDF (1439/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
1
RRAMKP1 0
R/W On-Chip RAM Storage Area 1 (corresponding area of
on-chip RAM (for data retention): page 1*)
0: The contents of the corresponding on-chip RAM
(for data retention) area are not retained in deep
standby mode.
1: The contents of the corresponding on-chip RAM
(for data retention) area are retained in deep
standby mode.
0
RRAMKP0 0
R/W On-Chip RAM Storage Area 0 (corresponding area of
on-chip RAM (for data retention): page 0*)
0: The contents of the corresponding on-chip RAM
(for data retention) area are not retained in deep
standby mode.
1: The contents of the corresponding on-chip RAM
(for data retention) area are retained in deep
standby mode.
Note: * For addresses in each page, see section 27, On-Chip RAM.
Rev. 2.00 Apr. 16, 2008 Page 1409 of 1652
REJ09B0313-0200