SH7203 Datasheet, PDF (787/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 15 Serial Communication Interface with FIFO (SCIF)
Table 15.10 SCSMR and SCSCR Settings and SCIF Clock Source Selection
SCSMR
SCSCR
SCIF Transmit/Receive Clock
Bit 1, 0
Bit 7 C/A CKE[1:0]
Mode
Clock
Source SCK Pin Function
0
00
Asynchronous Internal SCIF does not use the SCK pin
01
Outputs a clock with a frequency 16/8
times the bit rate
10
External Inputs a clock with frequency 16/8 times
the bit rate
11
Setting prohibited
1
0x
10
Clock
synchronous
Internal Outputs the serial clock
External Inputs the serial clock
11
Setting prohibited
[Legend]
x: Don't care
Note: When using the baud rate generator in double-speed mode (BGMD = 1), select
asynchronous mode by setting the C/A bit to 0, and select an internal clock as a clock
source and the SCK pin is not used (the CKE[1:0] bits set to 00).
Rev. 2.00 Apr. 16, 2008 Page 757 of 1652
REJ09B0313-0200