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SH7203 Datasheet, PDF (604/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
TGRA_3
TCDR
Synchronous clearing
Bit WRE = 1
TGRB_3
TCNT_3
(MTU2)
TCNT_4
(MTU2)
TDDR
H'0000
Positive phase
Negative phase
Output waveform is active-low.
Figure 11.60 Example of Synchronous Clearing in Dead Time during Down-Counting
(Timing (8) in Figure 11.56; Bit WRE of TWCR is 1)
Rev. 2.00 Apr. 16, 2008 Page 574 of 1652
REJ09B0313-0200