SH7203 Datasheet, PDF (1606/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 31 Electrical Characteristics
31.4.11 SSI Timing
Table 31.16 SSI Timing
Conditions: VCC = PLLVCC = USBDVCC = 1.1 to 1.3 V, PVCC = USBDPVCC = 3.0 to 3.6 V,
AVCC = 3.0 to 3.6 V, USBAVCC = 1.1 to 1.3 V, USBAPVCC = 3.0 to 3.6 V,
VSS = PLLVSS = PVSS = AVSS = USBDVSS = USBAVSS = USBDPVSS =
USBAPVSS = 0 V, Ta = −20 to 85 °C
Item
Output clock cycle
Input clock cycle
Clock high
Clock low
Clock rise time
Delay
Symbol Min.
tO
80
tI
80
tHC
32
tLC
32
tRC
⎯
tDTR
−5
Setup time
Hold time
tSR
25
tHTR
5
AUDIO_CLK input frequency fAUDIO
1
Max.
64000
64000
⎯
⎯
20
25
⎯
⎯
40
Unit Remarks
Figure
ns Output
ns Input
Figure
31.58
ns Bidirectional
ns
ns Output (100 pF)
ns Transmit
Figures
31.59,
31.60
ns Receive
ns Receive,
transmit
MHz
Figure
31.61
SSISCKn
t_HC
t_RC
t_LC
t_I ,t_O
Figure 31.58 Clock Input/Output Timing
Rev. 2.00 Apr. 16, 2008 Page 1576 of 1652
REJ09B0313-0200