SH7203 Datasheet, PDF (1607/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 31 Electrical Characteristics
SSISCKn
(Input or output)
SSIWSn, SSIDATAn
(Input)
t_SR
t_HTR
SSIWSn, SSIDATAn
(Output)
t_DTR
Figure 31.59 SSI Transmission and Reception Timing
(Synchronization with Rising Edge of SSISCKn)
SSISCKn
(Input or output)
SSIWSn, SSIDATAn
(Input)
t_SR
t_HTR
SSIWSn, SSIDATAn
(Output)
t_DTR
Figure 31.60 SSI Transmission and Reception Timing
(Synchronization with Falling Edge of SSISCKn)
f_AUDIO
AUDIO_CLK
Figure 31.61 AUDIO_CLK Input Timing
Rev. 2.00 Apr. 16, 2008 Page 1577 of 1652
REJ09B0313-0200