SH7203 Datasheet, PDF (1384/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 25 Pin Function Controller (PFC)
Bit
2 to 0
Initial
Bit Name Value R/W Description
SSI0CKS 000
[2:0]
R/W SSI ch0 Clock Select
Select the source of the oversampling clock that is
used in channel 0 of the SSI. For settings, see table
25.8.
Table 25.8 Selection of the Source of Oversampling Clock by Setting the SSInCKS Bits
Settings of
SSInCKS[2:0]*¹
0 or 1
Clock Operation Mode
2
3
000
AUDIO_X1 input
001
AUDIO_X1 input/4
010
AUDIO_CLK input*²
011
AUDIO_CLK input*²/4
100
EXTAL input
CKIO input
Setting prohibited
101
EXTAL input/4
CKIO input/4
Setting prohibited
110
EXTAL input/2
CKIO input/2
Setting prohibited
111
EXTAL input/8
CKIO input/8
Setting prohibited
Notes: 1. n = 0 to 3
2. When using the AUDIO_CLK input clock, set the PF30MD0 bit of the port F control
register H4 (PFCRH4) to 1.
Rev. 2.00 Apr. 16, 2008 Page 1354 of 1652
REJ09B0313-0200