SH7203 Datasheet, PDF (1166/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 23 USB 2.0 Host/Function Module (USB)
23.3.20 BEMP Interrupt Status Register (BEMPSTS)
BEMPSTS is a register that is used to confirm the BEMP interrupt status for each pipe.
This register is initialized by a power-on reset or a software reset.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
PIPE7 PIPE6 PIPE5 PIPE4 PIPE3 PIPE2 PIPE1 PIPE0
BEMP BEMP BEMP BEMP BEMP BEMP BEMP BEMP
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R R/W*¹ R/W*¹ R/W*¹ R/W*¹ R/W*¹ R/W*¹ R/W*¹ R/W*¹
Bit
Bit Name
15 to 8 ⎯
Initial
Value
All 0
7
PIPE7BEMP 0
6
PIPE6BEMP 0
5
PIPE5BEMP 0
4
PIPE4BEMP 0
3
PIPE3BEMP 0
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W*¹ BEMP Interrupts for PIPE7*²
0: Interrupts not generated
1: Interrupts generated
R/W*¹ BEMP Interrupts for PIPE6*²
0: Interrupts not generated
1: Interrupts generated
R/W*¹ BEMP Interrupts for PIPE5*²
0: Interrupts not generated
1: Interrupts generated
R/W*¹ BEMP Interrupts for PIPE4*²
0: Interrupts not generated
1: Interrupts generated
R/W*¹ BEMP Interrupts for PIPE3*²
0: Interrupts not generated
1: Interrupts generated
Rev. 2.00 Apr. 16, 2008 Page 1136 of 1652
REJ09B0313-0200