SH7203 Datasheet, PDF (1329/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

00
Setting Function 1
Register (Related Module)
PFCRL3 PF11 I/O (port)
PF10 I/O (port)
PF9 I/O (port)
PF8 I/O (port)
PFCRL2 PF7 I/O (port)
PF6 I/O (port)
PF5 I/O (port)
PF4 I/O (port)
PFCRL1 PF3 I/O (port)
PF2 I/O (port)
PF1 I/O (port)
PF0 I/O (port)
Section 25 Pin Function Controller (PFC)
Setting of Mode Bits (PFnMD[1:0])
01
10
Function 2
(Related Module)
Function 3
(Related Module)
NAF3 I/O (FLCTL)
LCD_DATA11 output
(LCDC)
NAF2 I/O (FLCTL)
LCD_DATA10 output
(LCDC)
NAF1 I/O (FLCTL)
LCD_DATA9 output
(LCDC)
NAF0 I/O (FLCTL)
LCD_DATA8 output
(LCDC)
FSC output (FLCTL)
LCD_DATA7 output
(LCDC)
FOE output (FLCTL)
LCD_DATA6 output
(LCDC)
FCDE output (FLCTL) LCD_DATA5 output
(LCDC)
FWE output (FLCTL)
LCD_DATA4 output
(LCDC)
TCLKD input (MTU2) LCD_DATA3 output
(LCDC)
TCLKC input (MTU2) LCD_DATA2 output
(LCDC)
TCLKB input (MTU2) LCD_DATA1 output
(LCDC)
TCLKA input (MTU2) LCD_DATA0 output
(LCDC)
11
Function 4
(Related Module)
⎯
⎯
⎯
⎯
SCS1 I/O (SSU)
SSO1 I/O (SSU)
SSI1 I/O (SSU)
SSCK1 I/O (SSU)
SCS0 I/O (SSU)
SSO0 I/O (SSU)
SSI0 I/O (SSU)
SSCK0 I/O (SSU)
25.1 Features
• By setting the control registers, multiplexed pin functions can be selectable.
• When the general I/O function or TIOC I/O function of MTU2 is specified, the I/O direction
can be selected by I/O register settings.
• Switching the port A function by the settings of the A/D control/status register of the A/D
converter (ADCSR) or D/A control register of the D/A converter (DACR).
Rev. 2.00 Apr. 16, 2008 Page 1299 of 1652
REJ09B0313-0200