SH7203 Datasheet, PDF (480/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Channel Register Name
Abbrevia-
Initial
tion
R/W value Address
Access
Size
Common Timer output master enable
to 3 and register
4
Timer output control register 1
TOER
TOCR1
R/W H'C0 H'FFFE420A 8
R/W H'00 H'FFFE420E 8
Timer output control register 2 TOCR2 R/W H'00 H'FFFE420F 8
Timer gate control register
TGCR
R/W H80 H'FFFE420D 8
Timer cycle control register TCDR
R/W H'FFFF H'FFFE4214 16
Timer dead time data register TDDR
R/W H'FFFF H'FFFE4216 16
Timer subcounter
TCNTS R H'0000 H'FFFE4220 16
Timer cycle buffer register
TCBR
R/W H'FFFF H'FFFE4222 16
Timer interrupt skipping set
register
TITCR
R/W H'00 H'FFFE4230 8
Timer interrupt skipping counter TITCNT R H'00 H'FFFE4231 8
Timer buffer transfer set
register
TBTER R/W H'00 H'FFFE4232 8
Timer dead time enable
register
TDER
R/W H'01 H'FFFE4234 8
Timer waveform control register TWCR
R/W H'00 H'FFFE4260 8
Timer output level buffer
register
TOLBR R/W H'00 H'FFFE4236 8
Rev. 2.00 Apr. 16, 2008 Page 450 of 1652
REJ09B0313-0200