SH7203 Datasheet, PDF (395/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 9 Bus State Controller (BSC)
CKIO
A25 to A0
CExx
RD/WR
Read
Write
ICIORD
D15 to D0
ICIOWR
D15 to D0
BS
Tpci1
Tpci1w
Tpci1w
Tpci1w
Tpci2
Figure 9.45 Basic Access Timing for PCMCIA I/O Card Interface
CKIO
A25 to A0
CE1x
CE2x
RD/WR
Read
Write
ICIORD
D15 to D0
ICIOWR
D15 to D0
BS
WAIT
IOIS16
Tpci0
Tpci0w Tpci1 Tpci1w Tpci1w Tpci1w Tpci1w Tpci2 Tpci2w Tpci0
Tpci0w Tpci1 Tpci1w Tpci1w Tpci1w Tpci1w Tpci2 Tpci2w
Figure 9.46 Dynamic Bus-Size Adjustment Timing for PCMCIA I/O Card Interface
(TED[3:0] = B'0010, PCW[3:0] = B'0000, TEH[3:0] = B'0001, Hardware Wait = 1)
Rev. 2.00 Apr. 16, 2008 Page 365 of 1652
REJ09B0313-0200