D12320VF25V Datasheet, PDF (991/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
In the H8S/2319 F-ZTAT, the EB11 to EB0 bits are initialized to 0 when the SWE1 bit
is not set to 1, and the EB15 to EB12 bits are initialized to 0 when the SWE2 bit is not
set to 1.
14. FLMCR1, FLMCR2, EBR1, and EBR2 are 8-bit registers. Only byte access can be
used on these registers, with the access requiring two states (Applies to the F-ZTAT
versions but the H8S/2319C F-ZTAT).
15. The SYSCR2 register can only be used in the F-ZTAT versions. In the mask ROM
versions this register will return an undefined value if read, and cannot be written to.
16. Value of bits 3 to 0.
17. The initial value depends on the mode.
18. Value of bits 4 to 0.
19. Valid only in the F-ZTAT versions but the H8S/2314 F-ZTAT. In the H8S/2314 F-ZTAT,
this cannot be used and must not be accessed.
20. This applies to the H8S/2319C F-ZTAT only. Access is possible when the on-chip flash
memory is enabled.
21. The initial value after startup is H'00 in the user boot mode and user program mode.
The initial value after startup in the user boot mode is H'AA.
Rev.7.00 Feb. 14, 2007 page 957 of 1108
REJ09B0089-0700