D12320VF25V Datasheet, PDF (1118/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix C I/O Port Block Diagrams
Reset
R
Q
D
PF1DDR
C
WDDRF
Reset
R
Q
D
PF1
PF1DR
C
WDRF
Modes 4 to 6
RDRF
Bus controller
BRLE bit
Bus request
acknowledge
output
Chip select
Legend:
WDDRF: Write to PFDDR
WDRF: Write to PFDR
RDRF: Read PFDR
RPORF: Read port F
CS25E: CS25 enable
PF1CS5S: Port F1 chip select 5 select
BRLE:
Bus release enable
RPORF
Port
CS25E bit
PF1CS5S bit
Interrupt controller
IRQ interrupt input
Figure C.10(b) Port F Block Diagram (Pin PF1)
Rev.7.00 Feb. 14, 2007 page 1084 of 1108
REJ09B0089-0700