D12320VF25V Datasheet, PDF (1135/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix D Pin States
Port Name
Pin Name
MCU
Operating
Mode
Reset
Hardware
Standby Software
Mode
Standby Mode
Bus-Released
State
Program Execution
State
Sleep Mode
PG1/CS3/ 4 to 6
T
T
CS6/IRQ7
[CSS36 · CS25E + [CSS36 · CS25E + [CSS36 · CS25E +
CSS36 · CS167E
= 0]
kept
CSS36 · CS167E
= 0]
kept
CSS36 · CS167E
= 0]
I/O port
[CSS36 · CS25E ·
DDR = 1]
[CSS36 · CS25E + [CSS36 · CS25E ·
CSS36 · CS167E DDR = 1]
T
= 1]
Input port
T
[CSS36 · CS167E ·
DDR = 1]
[CSS36 · CS167E ·
DDR = 1]
T
Input port
[CSS36 · CS25E ·
DDR · OPE = 1]
T
[CSS36 · CS25E ·
DDR = 1]
CS3
[CSS36 · CS167E ·
DDR · OPE = 1]
T
[CSS36 · CS167E ·
DDR = 1]
CS6
[CSS36 · CS25E ·
DDR · OPE = 1]
H
[CSS36 · CS167E ·
DDR · OPE = 1]
H
7
T
T
kept
kept
I/O port
PG0/ADTRG/ 4 to 7
T
T
kept
IRQ6
kept
I/O port
WDTOVF^*1 4 to 7
H
H
H
H
H^*2
Legend:
H:
L:
T:
kept:
DDR:
OPE:
WAITE:
BRLE:
BREQOE:
AnE:
ASOD:
CS167E:
CS25E:
High level
Low level
High impedance
Input port becomes high-impedance, output port retains state
Data direction register
Output port enable
Wait input enable
Bus release enable
BREQO pin enable
Address n enable (n = 23 to 20)
AS output disable
CS167 enable
CS25 enable
Rev.7.00 Feb. 14, 2007 page 1101 of 1108
REJ09B0089-0700