D12320VF25V Datasheet, PDF (953/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix A Instruction Set
Branch
Byte Word
Instruction Address Stack
Data Data Internal
Fetch
Read Operation Access Access Operation
Instruction Mnemonic
I
J
K
L
M
N
XOR
XOR.B #xx:8,Rd
1
XOR.B Rs,Rd
1
XOR.W #xx:16,Rd
2
XOR.W Rs,Rd
1
XOR.L #xx:32,ERd
3
XOR.L ERs,ERd
2
XORC
XORC #xx:8,CCR
1
XORC #xx:8,EXR
2
Notes: 1. The number of state cycles is 2 when EXR is invalid, and 3 when EXR is valid.
2. When n bytes of data are transferred.
3. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
Rev.7.00 Feb. 14, 2007 page 919 of 1108
REJ09B0089-0700