D12320VF25V Datasheet, PDF (12/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Item
17.8.3 Error
Protection
Page
604
17.11.2 Socket
609
Adapters and Memory
Map
17.13.1 Features 629
17.17.3 Error
664
Protection
17.20.2 Socket
670
Adapters and Memory
Map
17.22.1 Features 686
17.22.4 Mode
690
Comparison
Table 17.46
Comparison of
Programming Modes
17.23.2
704
Programming/Erasing
Interface Parameter
Revision (See Manual for Details)
Description amended
(Before) • When a bus master other than the CPU (the DMAC
or DTC) has control ... → (After) • When a bus master other
than the CPU (the DTC) has control ...
Description added
In programmer mode, ... figure 17.21. This enables the chip to
fit a 40-pin socket. Figure 17.20 shows ...
Description amended
• Reprogramming capability
The flash memory can be reprogrammed a minimum of 100
times.
Description amended
(Before) • When a bus master other than the CPU (the DMAC
or DTC) has control ... → (After) • When a bus master other
than the CPU (the DTC) has control ...
Description added
In programmer mode, ... figure 17.51. This enables the chip to
fit a 40-pin socket. Figure 17.50 shows ...
Description amended
• Protection modes
There are three protection modes: software protection by the
register setting, hardware protection by reset/hardware standby,
and error protection. The protection ...
Table 17.46 amended
Programming/
Erasing
Environment
Programming/
Erasing Enable
MAT
Program/Erase
Control
All Erasure
Boot mode
On-board
programming
User program
mode
On-board
programming
User boot mode
On-board
programming
PROM mode
On-board
programming
User MAT
User boot MAT
User MAT
User MAT
User MAT
User boot MAT
Command method Programming/
Erasing Interface
(Automatic)
Programming/
Erasing Interface
Command method
(Automatic)
Description amended
... the CPU except for ER0 and ER1 are stored. The return
value of ... the registers except for ER0 and ER1, the stack area
must be ...
Rev.7.00 Feb. 14, 2007 page x of xxxii
REJ09B0089-0700