D12320VF25V Datasheet, PDF (572/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 14 A/D Converter (8 Analog Input Channel Version)
Bits 2 to 0—Channel Select 2 to 0 (CH2 to CH0): These bits are used together with the SCAN
bit to select the analog input channels.
Only set the input channel(s) while conversion is stopped (ADST = 0).
Group
Selection
CH2
0
1
Channel Selection
CH1
CH0
0
0
1
1
0
1
0
0
1
1
0
1
Description
Single Mode (SCAN = 0) Scan Mode (SCAN = 1)
AN0 (Initial value)
AN0
AN1
AN0, AN1
AN2
AN0 to AN2
AN3
AN0 to AN3
AN4
AN4
AN5
AN4, AN5
AN6
AN4 to AN6
AN7
AN4 to AN7
14.2.3 A/D Control Register (ADCR)
Bit
:
7
6
5
4
3
2
1
0
TRGS1 TRGS0 —
—
CKS1
—
—
—
Initial value :
0
0
1
1
1
1
1
1
R/W
: R/W
R/W
—
—
R/W
R/W
—
—
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion operations.
ADCR is initialized to H'3F by a reset, and in standby mode or module stop mode.
Bits 7 and 6—Timer Trigger Select 1 and 0 (TRGS1, TRGS0): These bits select enabling or
disabling of the start of A/D conversion by a trigger signal. Only set bits TRGS1 and TRGS0
while conversion is stopped (ADST = 0).
Rev.7.00 Feb. 14, 2007 page 538 of 1108
REJ09B0089-0700