D12320VF25V Datasheet, PDF (737/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 17 ROM
(6) Flash Transfer Destination Address Register (FTDAR)
FTDAR specifies the on-chip RAM address to which the on-chip program is downloaded. Make
settings for FTDAR before writing 1 to the SCO bit in FCCS. The initial value is H'00 which
points to the start address (H'FFBC00) in on-chip RAM.
Bit
:
Initial value :
R/W
:
7
TDER
0
R/W
6
TDA6
0
R/W
5
TDA5
0
R/W
4
TDA4
0
R/W
3
TDA3
0
R/W
2
TDA2
0
R/W
1
TDA1
0
R/W
0
TDA0
0
R/W
Bit 7—Transfer Destination Address Setting Error: This bit is set to 1 when there is an error in
the download start address set by bits 6 to 0 (TDA6 to TDA0). Whether the address setting is
erroneous or not is judged by checking whether the setting of TDA6 to TDA0 is between the range
of H'00 and H'03 after setting the SCO bit in FCCS to 1 and performing download. Before setting
the SCO bit to 1 be sure to set the FTDAR value between H'00 to H'03 as well as clearing this bit
to 0.
Bit 7
TDER
0
1
Description (Return Value after Download)
Setting of TDA6 to TDA0 is normal
(Initial value)
Setting of TDER and TDA4 to TDA0 is H'04 to H'FF and download has been aborted
Bits 6 to 0—Transfer Destination Address (TDA6 to TDA0): These bits specify the download
start address. A value from H'00 to H'03 can be set to specify the download start address in on-
chip RAM in 4-kbyte units.
A value from H'04 to H'7F cannot be set. If such a value is set, the TDER bit (bit 7) in this register
is set to 1 to prevent download from being executed.
Rev.7.00 Feb. 14, 2007 page 703 of 1108
REJ09B0089-0700