D12320VF25V Datasheet, PDF (646/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 17 ROM
Table 17.14 Settings for Each Operating Mode in Programmer Mode
Pin Names
Mode
FWE
CE
OE
WE
I/O7 to I/O0 A18 to A0
Read
H or L
L
L
H
Data output Ain
Output disable H or L
L
H
H
Hi-Z
×
Command write H or L^*3 L
H
L
Data input Ain^*2
Chip disable^*1
H or L
H
×
×
Hi-Z
×
Legend:
H: High level
L: Low level
Hi-Z: High impedance
×: Don’t care
Notes: 1. Chip disable is not a standby state; internally, it is an operation state.
2. Ain indicates that there is also address input in auto-program mode.
3. For command writes when making a transition to auto-program or auto-erase mode,
input a high level to the FWE pin.
Table 17.15 Programmer Mode Commands
Command Name
Number
of Cycles Mode
1st Cycle
Address Data
2nd Cycle
Mode Address Data
Memory read mode 1 + n
Write ×
H'00
Read RA
Dout
Auto-program mode 129
Write ×
H'40
Write PA
Din
Auto-erase mode
2
Write ×
H'20
Write ×
H'20
Status read mode 2
Write ×
H'71
Write ×
H'71
Legend:
RA: Read address
PA: Program address
×: Don’t care
Notes: 1. In auto-program mode, 129 cycles are required for command writing by a simultaneous
128-byte write.
2. In memory read mode, the number of cycles depends on the number of address write
cycles (n).
Rev.7.00 Feb. 14, 2007 page 612 of 1108
REJ09B0089-0700