D12320VF25V Datasheet, PDF (1065/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

ADCSR—A/D Control/Status Register
Appendix B Internal I/O Registers
H'FF98
A/D Converter
Bit
:
Initial value :
Read/Write :
7
ADF
0
R/(W)*
6
ADIE
0
R/W
5
ADST
0
R/W
4
SCAN
0
R/W
3
CKS
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
0
CH0
0
R/W
Channel Select
Note: These bits select the analog input channel(s).
Ensure that conversion is halted (ADST = 0) before making
a channel setting.
Group Channel
Selection Selection
Description
CH2 CH1 CH0
Single Mode
(SCAN = 0)
Scan Mode
(SCAN = 1)
0
0 0 AN0
AN0
1 AN1
AN0, AN1
1 0 AN2
AN0 to AN2
1 AN3
AN0 to AN3
1
0 0 AN4
AN4
1 AN5
AN4, AN5
1 0 AN6
AN4 to AN6
1 AN7
AN4 to AN7
Clock Select
CKS is used in combination with CKS1, bit 3 in ADCR.
ADCR
Bit 3 Bit 3
Description
CKS1 CKS
0
0 Conversion time = 530 states (max.)
1 Conversion time = 68 states (max.)
1
0 Conversion time = 266 states (max.)
1 Conversion time = 134 states (max.)
Scan Mode
0 Single mode
1 Scan mode
A/D Start
0 A/D conversion stopped
1 • Single mode: A/D conversion is started. Cleared to 0 automatically when
conversion ends
• Scan mode: A/D conversion is started. Conversion continues sequentially
on the selected channels until ADST is cleared to 0 by software, a reset,
or transition to standby mode or module stop mode
A/D Interrupt Enable
0 A/D conversion end interrupt request disabled
1 A/D conversion end interrupt request enabled
A/D End Flag
0 [Clearing conditions]
• When 0 is written to the ADF flag after reading ADF = 1
• When the DTC is activated by an ADI interrupt, and ADDR is read
1 [Setting conditions]
• Single mode: When A/D conversion ends
• Scan mode: When A/D conversion ends on all specified channels
Note: * Can only be written with 0 for flag clearing.
Rev.7.00 Feb. 14, 2007 page 1031 of 1108
REJ09B0089-0700