D12320VF25V Datasheet, PDF (472/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 12 Serial Communication Interface (SCI)
12.2.5 Serial Mode Register (SMR)
Bit
:
7
6
5
C/A
CHR
PE
Initial value :
0
0
0
R/W
: R/W
R/W
R/W
4
3
2
1
0
O/E
STOP
MP
CKS1 CKS0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
SMR is an 8-bit register used to set the SCI’s serial transfer format and select the baud rate
generator clock source.
SMR can be read or written to by the CPU at all times.
SMR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
and module stop mode it retains its previous state.
Bit 7—Communication Mode (C/A): Selects asynchronous mode or synchronous mode as the
SCI operating mode.
Bit 7
C/A
0
1
Description
Asynchronous mode
Synchronous mode
(Initial value)
Bit 6—Character Length (CHR): Selects 7 or 8 bits as the data length in asynchronous mode. In
synchronous mode, a fixed data length of 8 bits is used regardless of the CHR setting.
Bit 6
CHR
Description
0
8-bit data
1
7-bit data^*
(Initial value)
Note: * When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted, and it is not possible
to choose between LSB-first or MSB-first transfer.
Rev.7.00 Feb. 14, 2007 page 438 of 1108
REJ09B0089-0700