D12320VF25V Datasheet, PDF (628/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 17 ROM
H'FFDC00
H'FFE3FF
Boot program
area (2 kbytes)^*2
H'FFEBFF
H'FFEC00
Programming
control program
area (6 kbytes)
Reserved area used
only in boot mode
(4 kbytes)^*1
H'FFFBFF
Notes: 1. This is a reserved area used only in boot mode. It should not be used for any purpose
other than flash memory programming/erasing.
2. This area cannot be used until a transition is made to the execution state for the
programming control program transferred to RAM. Note also that the boot program
remains in this area in RAM even after control branches to the programming control
program.
Figure 17.13 RAM Areas in Boot Mode
Notes on Use of Boot Mode
• When the chip comes out of reset in boot mode, it measures the low-level period of the input at
the SCI’s RxD1 pin. The reset should end with RxD1 high. After the reset ends, it takes
approximately 100 states before the chip is ready to measure the low-level period of the RxD1
pin.
• In boot mode, if any data has been programmed into the flash memory (if all data is not 1), all
flash memory blocks are erased. Boot mode is for use when user program mode is unavailable,
such as the first time on-board programming is performed, or if the program activated in user
program mode is accidentally erased.
• Interrupts cannot be used while the flash memory is being programmed or erased.
• The RxD1 and TxD1 pins should be pulled up on the board.
• Before branching to the programming control program (RAM area H'FFE400 to H'FFFBFF),
the chip terminates transmit and receive operations by the on-chip SCI (channel 1) (by clearing
the RE and TE bits in SCR to 0), but the adjusted bit rate value remains set in BRR. The
transmit data output pin, TxD1, goes to the high-level output state (P31DDR = 1, P31DR = 1).
Rev.7.00 Feb. 14, 2007 page 594 of 1108
REJ09B0089-0700