D12320VF25V Datasheet, PDF (549/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 13 Smart Card Interface
13.3.5 Clock
Only an internal clock generated by the built-in baud rate generator can be used as the
transmit/receive clock for the smart card interface. The bit rate is set with BRR and the CKS1,
CKS0, BCP1, and BCP0 bits in SMR. The formula for calculating the bit rate is as shown below.
Table 13.5 shows some sample bit rates.
If clock output is selected by setting CKE0 to 1, the clock is output from the SCK pin. The clock
frequency is determined by the bit rate and the setting of bits BCP1 and BCP0.
B=
φ
S × 2²ⁿ⁺¹ × (N + 1)
× 10⁶
Where N = Value set in BRR (0 ≤ N ≤ 255)
B = Bit rate (bits/s)
φ = Operating frequency (MHz)
n = See table 13.4
S = Number of internal clock cycles in 1-bit period set by bits BCP1 and BCP0
Table 13.4 Correspondence between n and CKS1, CKS0
n
CKS1
CKS0
0
0
0
1
1
2
1
0
3
1
Table 13.5 Examples of Bit Rate B (bits/s) for Various BRR Settings
(When n = 0 and S = 372)
φ (MHz)
N
10.00 10.714 13.00 14.285 16.00 18.00
0
13441 14400 17473 19200 21505 24194
1
6720 7200 8737 9600 10753 12097
2
4480 4800 5824 6400 7168 8065
Note: Bit rates are rounded to the nearest whole number.
20.00
26882
13441
8961
25.00
33602
16801
11201
Rev.7.00 Feb. 14, 2007 page 515 of 1108
REJ09B0089-0700