D12320VF25V Datasheet, PDF (82/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 2 CPU
Type
Logic
operations
Instruction
AND
OR
XOR
NOT
Shift
operations
SHAL
SHAR
SHLL
SHLR
ROTL
ROTR
ROTXL
ROTXR
Size^*1
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
Function
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register
and another general register or immediate data.
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register
and another general register or immediate data.
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general
register and another general register or immediate data.
¬ (Rd) → (Rd)
Takes the one's complement of general register
contents.
Rd (shift) → Rd
Performs an arithmetic shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (shift) → Rd
Performs a logical shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (rotate) → Rd
Rotates general register contents.
1-bit or 2-bit rotation is possible.
Rd (rotate) → Rd
Rotates general register contents through the carry flag.
1-bit or 2-bit rotation is possible.
Rev.7.00 Feb. 14, 2007 page 48 of 1108
REJ09B0089-0700