D12320VF25V Datasheet, PDF (109/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 3 MCU Operating Modes
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins
MD2 to MD0 (the current operating mode). Bits MDS2 to MDS0 correspond to pins MD2 to
MD0. MDS2 to MDS0 are read-only bits, and cannot be written to. The mode pin (MD2 to MD0)
input levels are latched into these bits when MDCR is read. These latches are canceled by a reset.
3.2.2 System Control Register (SYSCR)
Bit
:
7
—
Initial value :
0
R/W
: R/W
6
5
4
3
2
1
—
INTM1 INTM0 NMIEG LWROD —
0
0
0
0
0
0
—
R/W
R/W
R/W
R/W
R/W
0
RAME
1
R/W
Bit 7—Reserved: Only 0 should be written to this bit.
Bit 6—Reserved: This bit is always read as 0, and cannot be modified.
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select the control
mode of the interrupt controller. For details of the interrupt control modes, see section 5.4.1,
Interrupt Control Modes and Interrupt Operation.
Bit 5
INTM1
0
1
Bit 4
INTM0
0
1
0
1
Interrupt Control
Mode
Description
0
Control of interrupts by I bit
(Initial value)
—
Setting prohibited
2
Control of interrupts by I2 to I0 bits and IPR
—
Setting prohibited
Bit 3—NMI Edge Select (NMIEG): Selects the valid edge of the NMI interrupt input.
Bit 3
NMIEG
0
1
Description
An interrupt is requested at the falling edge of NMI input
An interrupt is requested at the rising edge of NMI input
(Initial value)
Rev.7.00 Feb. 14, 2007 page 75 of 1108
REJ09B0089-0700