D12320VF25V Datasheet, PDF (231/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 7 Data Transfer Controller
7.3.2 Activation Sources
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. An interrupt becomes a DTC activation source when the corresponding bit is set to 1, and a
CPU interrupt source when the bit is cleared to 0.
At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. Table 7.4 shows activation source and
DTCER clearance. The activation source flag, in the case of RXI0, for example, is the RDRF flag
of SCI0.
Table 7.4 Activation Source and DTCER Clearance
Activation Source
Software activation
When the DISEL Bit Is 0 and
the Specified Number of
Transfers Have Not Ended
The SWDTE bit is cleared to 0
Interrupt activation
• The corresponding DTCER
bit remains set to 1
• The activation source flag is
cleared to 0
When the DISEL Bit Is 1, or when
the Specified Number of Transfers
Have Ended
• The SWDTE bit remains set to 1
• An interrupt is issued to the CPU
• The corresponding DTCER bit is
cleared to 0
• The activation source flag remains
set to 1
• A request is issued to the CPU for
the activation source interrupt
Figure 7.3 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
Rev.7.00 Feb. 14, 2007 page 197 of 1108
REJ09B0089-0700