D12320VF25V Datasheet, PDF (257/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8.2.2 Register Configuration
Table 8.2 shows the port 1 register configuration.
Table 8.2 Port 1 Registers
Name
Abbreviation R/W
Port 1 data direction register
P1DDR
W
Port 1 data register
P1DR
R/W
Port 1 register
PORT1
R
Port function control register 1 PFCR1
R/W
Note: * Lower 16 bits of the address.
Section 8 I/O Ports
Initial Value
H'00
H'00
Undefined
H'0F
Address^*
H'FEB0
H'FF60
H'FF50
H'FF45
Port 1 Data Direction Register (P1DDR)
Bit
:7
6
5
4
3
2
1
0
P17DDR P16DDR P15DDR P14DDR P13DDR P12DDR P11DDR P10DDR
Initial value : 0
0
0
0
0
0
0
0
R/W
:W
W
W
W
W
W
W
W
P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 1. P1DDR cannot be read; if it is, an undefined value will be read.
Setting a P1DDR bit to 1 makes the corresponding port 1 pins output pins, while clearing the bit to
0 makes the pins input pins.
P1DDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Whether the address output pins maintain their output state or go to the high-impedance state in a
transition to software standby mode is selected by the OPE bit in SBYCR.
Rev.7.00 Feb. 14, 2007 page 223 of 1108
REJ09B0089-0700