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D12320VF25V Datasheet, PDF (830/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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Section 18 Clock Pulse Generator
Bit 2
SCK2
0
1
Bit 1
SCK1
0
1
0
1
Bit 0
SCK0
0
1
0
1
0
1
â
Description
DIV = 0
DIV = 1
Bus master is in high-speed
Bus master is in high-speed
mode
(Initial value) mode
(Initial value)
Medium-speed clock is Ï/2
Clock supplied to entire chip is Ï/2
Medium-speed clock is Ï/4
Clock supplied to entire chip is Ï/4
Medium-speed clock is Ï/8
Clock supplied to entire chip is Ï/8
Medium-speed clock is Ï/16
â
Medium-speed clock is Ï/32
â
â
â
18.3 Oscillator
Clock pulses can be supplied by connecting a crystal resonator, or by input of an external clock.
18.3.1 Connecting a Crystal Resonator
Circuit Configuration: A crystal resonator can be connected as shown in the example in figure
18.2. Select the damping resistance Rd according to table 18.2. An AT-cut parallel-resonance
crystal should be used.
CL1
EXTAL
XTAL
Rd
CL2
CL1 = CL2 = 10 to 22 pF
Figure 18.2 Connection of Crystal Resonator (Example)
Table 18.2 Damping Resistance Value
Frequency (MHz)
Rd (Ω)
2
4
8
12
16
20
25
6.8 k 500
200
0
0
0
0
Rev.7.00 Feb. 14, 2007 page 796 of 1108
REJ09B0089-0700
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