D12320VF25V Datasheet, PDF (542/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 13 Smart Card Interface
13.2.4 Serial Control Register (SCR)
Bit
:
7
6
5
TIE
RIE
TE
Initial value :
0
0
0
R/W
: R/W
R/W
R/W
4
3
2
1
0
RE
MPIE TEIE CKE1 CKE0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
In smart card interface mode, the function of bits 1 and 0 of SCR changes when bit 7 of the serial
mode register (SMR) is set to 1.
Bits 7 to 2—Operate in the same way as for the normal SCI. For details, see section 12.2.6, Serial
Control Register (SCR).
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits are used to select the SCI clock
source and enable or disable clock output from the SCK pin.
In smart card interface mode, in addition to the normal switching between clock output enabling
and disabling, the clock output can be specified as being fixed high or low.
SCMR
SMIF
0
1
1
1
1
1
1
SMR
SCR Setting
GM
CKE1
CKE0
See the SCI specification
0
0
0
0
0
1
1
0
0
1
0
1
1
1
0
1
1
1
SCK Pin Function
Operates as port I/O pin
Outputs clock as SCK output pin
Operates as SCK output pin, with output fixed
low
Outputs clock as SCK output pin
Operates as SCK output pin, with output fixed
high
Outputs clock as SCK output pin
Rev.7.00 Feb. 14, 2007 page 508 of 1108
REJ09B0089-0700