D12320VF25V Datasheet, PDF (517/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 12 Serial Communication Interface (SCI)
Data Transfer Operations
SCI initialization (synchronous mode): Before transmitting or receiving data, first clear the TE
and RE bits in SCR to 0, then initialize the SCI as described below.
When the operating mode, transfer format, etc., is changed, the TE and RE bits must be cleared to
0 before making the change using the following procedure. When the TE bit is cleared to 0, the
TDRE flag is set to 1 and TSR is initialized. Note that clearing the RE bit to 0 does not change the
contents of the RDRF, PER, FER, and ORER flags, or the contents of RDR.
Figure 12.15 shows a sample SCI initialization flowchart.
Start of initialization
[1] Set the clock selection in SCR. Be sure
to clear bits RIE, TIE, TEIE, and MPIE,
Clear TE and RE bits in SCR to 0
TE and RE, to 0.
[2] Set the data transfer format in SMR
and SCMR.
Set CKE1 and CKE0 bits in SCR
(TE, RE bits 0)
[1] _{[3] Write a value corresponding to the bit}
rate to BRR. (Not necessary if an
Set data transfer format in
SMR and SCMR
external clock is used.)
[2]
[4] Wait at least one bit interval, then set
the TE bit or RE bit in SCR to 1.
Set value in BRR
[3]
Also set the RIE, TIE, TEIE, and MPIE
bits as necessary.
Wait
Setting the TE or RE bit enables the
TxD or RxD pin to be used.
No
1-bit interval elapsed?
Yes
Set TE or RE bit in SCR to 1, and
set RIE, TIE, TEIE, and MPIE bits ^[4]
as necessary
<Transfer start>
Note: In simultaneous transmit and receive operations, the TE and RE bits should
both be cleared to 0 or set to 1 simultaneously.
Figure 12.15 Sample SCI Initialization Flowchart
Rev.7.00 Feb. 14, 2007 page 483 of 1108
REJ09B0089-0700