D12320VF25V Datasheet, PDF (430/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 8-Bit Timers
Bit 7—Compare Match Interrupt Enable B (CMIEB): Selects whether CMFB interrupt
requests (CMIB) are enabled or disabled when the CMFB flag in TCSR is set to 1.
Bit 7
CMIEB
0
1
Description
CMFB interrupt requests (CMIB) are disabled
CMFB interrupt requests (CMIB) are enabled
(Initial value)
Bit 6—Compare Match Interrupt Enable A (CMIEA): Selects whether CMFA interrupt
requests (CMIA) are enabled or disabled when the CMFA flag in TCSR is set to 1.
Bit 6
CMIEA
0
1
Description
CMFA interrupt requests (CMIA) are disabled
CMFA interrupt requests (CMIA) are enabled
(Initial value)
Bit 5—Timer Overflow Interrupt Enable (OVIE): Selects whether OVF interrupt requests
(OVI) are enabled or disabled when the OVF flag in TCSR is set to 1.
Bit 5
OVIE
0
1
Description
OVF interrupt requests (OVI) are disabled
OVF interrupt requests (OVI) are enabled
(Initial value)
Bits 4 and 3—Counter Clear 1 and 0 (CCLR1 and CCLR0): These bits select the method by
which TCNT is cleared: by compare match A or B, or by an external reset input.
Bit 4
CCLR1
0
1
Bit 3
CCLR0
0
1
0
1
Description
Clearing is disabled
Clear by compare match A
Clear by compare match B
Clear by rising edge of external reset input
(Initial value)
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select whether the clock input to
TCNT is an internal or external clock.
Three internal clocks can be selected, all divided from the system clock (φ): φ/8, φ/64, and φ/8192.
The falling edge of the selected internal clock triggers the count.
Rev.7.00 Feb. 14, 2007 page 396 of 1108
REJ09B0089-0700