D12320VF25V Datasheet, PDF (968/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix A Instruction Set
A.6 Condition Code Modification
This section indicates the effect of each CPU instruction on the condition code. The notation used
in the table is defined below.
31 for longword operands
m = _{15 for word operands}
7 for byte operands
Si
The i-th bit of the source operand
Di
The i-th bit of the destination operand
Ri
The i-th bit of the result
Dn The specified bit in the destination operand
—
Not affected
Modified according to the result of the instruction (see definition)
0
Always cleared to 0
1
Always set to 1
*
Undetermined (no guaranteed value)
Z'
Z flag before instruction execution
C'
C flag before instruction execution
Rev.7.00 Feb. 14, 2007 page 934 of 1108
REJ09B0089-0700