D12320VF25V Datasheet, PDF (491/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 12 Serial Communication Interface (SCI)
Table 12.7 Maximum Bit Rate with External Clock Input (Synchronous Mode)
φ (MHz)
2
4
6
8
10
12
14
16
18
20
25
External Input Clock (MHz)
0.3333
0.6667
1.0000
1.3333
1.6667
2.0000
2.3333
2.6667
3.0000
3.3333
4.1667
Maximum Bit Rate (bits/s)
333333.3
666666.7
1000000.0
1333333.3
1666666.7
2000000.0
2333333.3
2666666.7
3000000.0
3333333.3
4166666.7
12.2.9 Smart Card Mode Register (SCMR)
Bit
:
7
6
5
4
3
2
1
0
—
—
—
—
SDIR SINV
—
SMIF
Initial value :
1
1
1
1
0
0
1
0
R/W
:—
—
—
—
R/W
R/W
—
R/W
SCMR selects LSB-first or MSB-first transfer by means of bit SDIR. Except in the case of
asynchronous mode 7-bit data, LSB-first or MSB-first transfer can be selected regardless of the
serial communication mode. The descriptions in this chapter refer to LSB-first transfer.
For details of the other bits in SCMR, see section 13.2.1, Smart Card Mode Register (SCMR).
SCMR is initialized to H'F2 by a reset and in hardware standby mode. In software standby mode
and module stop mode it retains its previous state.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.
Rev.7.00 Feb. 14, 2007 page 457 of 1108
REJ09B0089-0700