D12320VF25V Datasheet, PDF (745/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 17 ROM
(b) Flash multipurpose data destination parameter (FMPDR: general register ER0 of CPU):
This parameter indicates the start address in the area which stores the data to be programmed in
the user MAT. When the storage destination of the program data is in flash memory, an error
occurs. The error occurrence is indicated by the WD bit (bit 2) in FPFR.
FMPDR
Bit
:
Initial value :
R/W
:
31
MOD31
—
R/W
30
MOD30
—
R/W
29
MOD29
—
R/W
28
MOD28
—
R/W
27
MOD27
—
R/W
26
MOD26
—
R/W
25
MOD25
—
R/W
24
MOD24
—
R/W
Bit
:
Initial value :
R/W
:
23
MOD23
—
R/W
22
MOD22
—
R/W
21
MOD21
—
R/W
20
MOD20
—
R/W
19
MOD19
—
R/W
18
MOD18
—
R/W
17
MOD17
—
R/W
16
MOD16
—
R/W
Bit
:
Initial value :
R/W
:
15
MOD15
—
R/W
14
MOD14
—
R/W
13
MOD13
—
R/W
12
MOD12
—
R/W
11
MOD11
—
R/W
10
MOD10
—
R/W
9
MOD9
—
R/W
8
MOD8
—
R/W
Bit
:
Initial value :
R/W
:
7
MOD7
—
R/W
6
MOD6
—
R/W
5
MOD5
—
R/W
4
MOD4
—
R/W
3
MOD3
—
R/W
2
MOD2
—
R/W
1
MOD1
—
R/W
0
MOD0
—
R/W
Bits 31 to 0—MOD31 to MOD0: Store the start address of the area which stores the program
data for the user MAT. The consecutive 128-byte data is programmed to the user MAT starting
from the specified start address.
Rev.7.00 Feb. 14, 2007 page 711 of 1108
REJ09B0089-0700