D12320VF25V Datasheet, PDF (375/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 16-Bit Timer Pulse Unit (TPU)
Examples of 8-bit register access operation are shown in figures 9.3 to 9.5.
Bus
master
Internal data bus
H
L
Bus interface
Module
data bus
TCR
Figure 9.3 8-Bit Register Access Operation [Bus Master ↔ TCR (Upper 8 Bits)]
Internal data bus
H
Bus
master ^L
Bus interface
Module
data bus
TMDR
Figure 9.4 8-Bit Register Access Operation [Bus Master ↔ TMDR (Lower 8 Bits)]
Internal data bus
H
Bus
master ^L
Bus interface
Module
data bus
TCR
TMDR
Figure 9.5 8-Bit Register Access Operation [Bus Master ↔ TCR and TMDR (16 Bits)]
Rev.7.00 Feb. 14, 2007 page 341 of 1108
REJ09B0089-0700