D12320VF25V Datasheet, PDF (777/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 17 ROM
Figure 17.78 shows an example of programming of the data, after emulation has been completed,
to the EB0 area in the user MAT.
H'00000
EB0
H'01000
EB1
H'02000
EB2
H'03000
EB3
H'04000
EB4
H'05000
EB5
H'06000
EB6
H'07000
EB7
H'08000
Flash memory
(user MAT)
EB8 to EB15
H'7FFFF
[1] Cancel the emulation mode.
[2] Transfer the user-created program/
erase-procedure program.
[3] Download the on-chip programming/erasing
programs, avoiding the tuning <illegible>
data area set in FTDAR.
[4] Execute programming after erasing,
as necessary.
H'FFBC00
Download area
Area for the
programming-procedure
program
H'FFCC00
H'FFDC00
Copy of the tuned data
H'FFEBFF
On-chip RAM
H'FFFBFF
Figure 17.78 Programming of the Data After Tuning
[1] After the data to be programmed has fixed values, clear the RAMS bit to 0 to cancel the
overlap of RAM.
[2] Transfer the user programming/erasing procedure program to RAM.
[3] Run the programming/erasing procedure program in RAM and download the on-chip
programming/erasing program.
Specify the download start address with FTDAR so that the tuned data area does not overlap
with the download area.
[4] When the EB0 area of the user MAT has not been erased, the programming program will be
downloaded after erasure. Set the parameters FMPAR and FMPDR so that the tuned data is
designated, and execute programming.
Note:
Setting the RAMS bit to 1 puts all the blocks in the flash MAT into a program/erase-
protected state regardless of the values of the RAM2 to RAM0 bits (emulation protection).
In this state, downloading of the on-chip programs is also disabled, so clear the RAMS bit
before actual programming or erasure.
Rev.7.00 Feb. 14, 2007 page 743 of 1108
REJ09B0089-0700